Microchip AT91SAM9N12-CUR ARM926EJ-S Microprocessor SAM9N12 32 bit ARM 400 MHz 217-Pin BGA
- RS Stock No.:
- 775-389
- Mfr. Part No.:
- AT91SAM9N12-CUR
- Brand:
- Microchip
N
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- RS Stock No.:
- 775-389
- Mfr. Part No.:
- AT91SAM9N12-CUR
- Brand:
- Microchip
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Microchip | |
| Product Type | Microprocessor | |
| Series | SAM9N12 | |
| Device Core | ARM926EJ-S | |
| Data Bus Width | 32bit | |
| Instruction Set Architecture | ARM | |
| Maximum Clock Frequency | 400MHz | |
| Interface Type | ADC, LCD, SPI, USART, USB | |
| Mount Type | Surface Mount | |
| Minimum Supply Voltage | 0.9V | |
| Package Type | BGA | |
| Pin Count | 217 | |
| Maximum Supply Voltage | 1.1V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Width | 15mm | |
| Length | 14mm | |
| Height | 1.4mm | |
| Number of Cores | 1 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Microchip | ||
Product Type Microprocessor | ||
Series SAM9N12 | ||
Device Core ARM926EJ-S | ||
Data Bus Width 32bit | ||
Instruction Set Architecture ARM | ||
Maximum Clock Frequency 400MHz | ||
Interface Type ADC, LCD, SPI, USART, USB | ||
Mount Type Surface Mount | ||
Minimum Supply Voltage 0.9V | ||
Package Type BGA | ||
Pin Count 217 | ||
Maximum Supply Voltage 1.1V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Width 15mm | ||
Length 14mm | ||
Height 1.4mm | ||
Number of Cores 1 | ||
Automotive Standard No | ||
- COO (Country of Origin):
- CN
The Microchip microprocessor serves as a powerful foundation for multi-tasking applications, optimising performance and power efficiency with its Advanced architecture and integrated features.
Supports both 32-bit ARM and 16-bit Thumb instruction sets for flexible performance
Features a Memory Management Unit (MMU) for comprehensive memory control
Incorporates Harvard architecture with separate instruction and data buses for enhanced throughput
Offers tightly-coupled memory interfaces for reduced latency in critical applications
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