ISSI IS42S32800J-6TL SDRAM 8 MB Surface, 86-Pin 32 bit TSOP II
- RS Stock No.:
- 648-093
- Mfr. Part No.:
- IS42S32800J-6TL
- Brand:
- ISSI
N
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$7.29
(exc. GST)
$8.02
(inc. GST)
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- 108 unit(s) ready to ship from another location
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Units | Per unit |
|---|---|
| 1 + | $7.29 |
*price indicative
- RS Stock No.:
- 648-093
- Mfr. Part No.:
- IS42S32800J-6TL
- Brand:
- ISSI
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | ISSI | |
| Memory Size | 8MB | |
| Product Type | SDRAM | |
| Organisation | 8M x 32 bit | |
| Data Bus Width | 32bit | |
| Maximum Clock Frequency | 166MHz | |
| Maximum Random Access Time | 6ns | |
| Mount Type | Surface | |
| Package Type | TSOP II | |
| Pin Count | 86 | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 70°C | |
| Series | IS42S32800J | |
| Standards/Approvals | RoHS | |
| Maximum Supply Voltage | 4.6V | |
| Automotive Standard | No | |
| Supply Current | 140mA | |
| Minimum Supply Voltage | -0.5V | |
| Select all | ||
|---|---|---|
Brand ISSI | ||
Memory Size 8MB | ||
Product Type SDRAM | ||
Organisation 8M x 32 bit | ||
Data Bus Width 32bit | ||
Maximum Clock Frequency 166MHz | ||
Maximum Random Access Time 6ns | ||
Mount Type Surface | ||
Package Type TSOP II | ||
Pin Count 86 | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 70°C | ||
Series IS42S32800J | ||
Standards/Approvals RoHS | ||
Maximum Supply Voltage 4.6V | ||
Automotive Standard No | ||
Supply Current 140mA | ||
Minimum Supply Voltage -0.5V | ||
- COO (Country of Origin):
- CN
The ISSI 256Mb SDRAM is a high-speed CMOS dynamic random-access memory designed for 3.3V Vdd and 3.3V Vddq systems, containing 268435456 bits. It is internally organized as a quad-bank DRAM with a synchronous interface, with each 67108864-bit bank arranged as 4096 rows by 512 columns by 32 bits. The device supports AUTO REFRESH mode and a power-saving power-down mode. All signals are registered on the positive edge of the clock signal CLK.
LVTTL Interface
Auto Refresh (CBR)
Self Refresh