Texas Instruments DS90C365AMT/NOPB, LVDS Transceiver 3 Flat Panel Display, 48-Pin TSSOP
- RS Stock No.:
- 121-8582
- Mfr. Part No.:
- DS90C365AMT/NOPB
- Brand:
- Texas Instruments
Bulk discount available
Price (ex. GST) Each (In a Tube of 38)**
$8.973
(exc. GST)
$9.87
(inc. GST)
6 In Global stock for delivery within 10 working day(s)*
* Delivery dates may change based on your chosen quantity and delivery address.
FREE delivery for orders over $80.00 ex GST
Units | Per unit | Per Tube** |
---|---|---|
38 - 38 | $8.973 | $340.974 |
76 - 114 | $8.703 | $330.714 |
152 - 342 | $8.434 | $320.492 |
380 - 722 | $8.255 | $313.69 |
760 + | $8.076 | $306.888 |
**price indicative
- RS Stock No.:
- 121-8582
- Mfr. Part No.:
- DS90C365AMT/NOPB
- Brand:
- Texas Instruments
FlatLink/FPD-Link Serialiser/Deserialiser, Texas Instruments
LVDS Transmitters for use with 24-bit FPD (Flat Panel Display) links operating at 65 and 85 MHz.
LVCMOS/LVTTL inputs
3.3V Low-power operation
PLL transmitter data clock
Complies with TIA/EIA-644 LVDS standard
3.3V Low-power operation
PLL transmitter data clock
Complies with TIA/EIA-644 LVDS standard
The Texas Instruments DS90C365A is a pin to pin compatible replacement for DS90C363, DS90C363A and DS90C365. The DS90C365A has additional features and improvements making it an ideal replacement for DS90C363, DS90C363A and DS90C365. family of LVDS Transmitters.
Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365
No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered.
Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% centre spread or -5% down spread.
Input Clock Detection feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high.
18 to 87.5 MHz shift clock support
TX power consumption < 146 mW (typ) at 87.5 MHz Grayscale
TX Power-down mode < 37 uW (typ)
Supports VGA, SVGA, XGA, SXGA (dual pixel), SXGA+ (dual pixel), UXGA (dual pixel).
Narrow bus reduces cable size and cost
Up to 1.785 Gbps throughput
Up to 223.125 Megabytes/sec bandwidth
345 mV (typ) swing LVDS devices for low EMI
PLL requires no external components
Compliant to TIA/EIA-644 LVDS standard
Low profile 48-lead TSSOP package
No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered.
Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% centre spread or -5% down spread.
Input Clock Detection feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high.
18 to 87.5 MHz shift clock support
TX power consumption < 146 mW (typ) at 87.5 MHz Grayscale
TX Power-down mode < 37 uW (typ)
Supports VGA, SVGA, XGA, SXGA (dual pixel), SXGA+ (dual pixel), UXGA (dual pixel).
Narrow bus reduces cable size and cost
Up to 1.785 Gbps throughput
Up to 223.125 Megabytes/sec bandwidth
345 mV (typ) swing LVDS devices for low EMI
PLL requires no external components
Compliant to TIA/EIA-644 LVDS standard
Low profile 48-lead TSSOP package
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
LVDS Communication
Low Voltage Differential Signaling, or LVDS, is an electrical signaling system that can run at very high speeds over cheap, twisted-pair copper cables.
Applications: Firewire, SATA, SCSI
Related links
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