- RS Stock No.:
- 121-8582
- Mfr. Part No.:
- DS90C365AMT/NOPB
- Brand:
- Texas Instruments
On back order for despatch 09/07/2024, delivery within 10 working days from despatch date.
Added
Price (ex. GST) Each (In a Tube of 38)
$8.973
(exc. GST)
$9.87
(inc. GST)
Units | Per unit | Per Tube* |
38 - 38 | $8.973 | $340.974 |
76 - 114 | $8.703 | $330.714 |
152 - 342 | $8.434 | $320.492 |
380 - 722 | $8.255 | $313.69 |
760 + | $8.076 | $306.888 |
*price indicative |
- RS Stock No.:
- 121-8582
- Mfr. Part No.:
- DS90C365AMT/NOPB
- Brand:
- Texas Instruments
Legislation and Compliance
- COO (Country of Origin):
- US
Product Details
FlatLink/FPD-Link Serialiser/Deserialiser, Texas Instruments
LVDS Transmitters for use with 24-bit FPD (Flat Panel Display) links operating at 65 and 85 MHz.
LVCMOS/LVTTL inputs
3.3V Low-power operation
PLL transmitter data clock
Complies with TIA/EIA-644 LVDS standard
3.3V Low-power operation
PLL transmitter data clock
Complies with TIA/EIA-644 LVDS standard
The Texas Instruments DS90C365A is a pin to pin compatible replacement for DS90C363, DS90C363A and DS90C365. The DS90C365A has additional features and improvements making it an ideal replacement for DS90C363, DS90C363A and DS90C365. family of LVDS Transmitters.
Pin-to-pin compatible to DS90C363, DS90C363A and DS90C365
No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered.
Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% centre spread or -5% down spread.
Input Clock Detection feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high.
18 to 87.5 MHz shift clock support
TX power consumption < 146 mW (typ) at 87.5 MHz Grayscale
TX Power-down mode < 37 uW (typ)
Supports VGA, SVGA, XGA, SXGA (dual pixel), SXGA+ (dual pixel), UXGA (dual pixel).
Narrow bus reduces cable size and cost
Up to 1.785 Gbps throughput
Up to 223.125 Megabytes/sec bandwidth
345 mV (typ) swing LVDS devices for low EMI
PLL requires no external components
Compliant to TIA/EIA-644 LVDS standard
Low profile 48-lead TSSOP package
No special start-up sequence required between clock/data and /PD pins. Input signals (clock and data) can be applied either before or after the device is powered.
Support Spread Spectrum Clocking up to 100kHz frequency modulation & deviations of ±2.5% centre spread or -5% down spread.
Input Clock Detection feature will pull all LVDS pairs to logic low when input clock is missing and when /PD pin is logic high.
18 to 87.5 MHz shift clock support
TX power consumption < 146 mW (typ) at 87.5 MHz Grayscale
TX Power-down mode < 37 uW (typ)
Supports VGA, SVGA, XGA, SXGA (dual pixel), SXGA+ (dual pixel), UXGA (dual pixel).
Narrow bus reduces cable size and cost
Up to 1.785 Gbps throughput
Up to 223.125 Megabytes/sec bandwidth
345 mV (typ) swing LVDS devices for low EMI
PLL requires no external components
Compliant to TIA/EIA-644 LVDS standard
Low profile 48-lead TSSOP package
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
LVDS Communication
Low Voltage Differential Signaling, or LVDS, is an electrical signaling system that can run at very high speeds over cheap, twisted-pair copper cables.
Applications: Firewire, SATA, SCSI
Specifications
Attribute | Value |
---|---|
Number of Drivers | 3 |
Output Type | Flat Panel Display |
IC Type | Transceiver IC |
Transmission Data Rate | 612.5Mbps |
Number of Elements per Chip | 3 |
Mounting Type | Surface Mount |
Package Type | TSSOP |
Pin Count | 48 |
Dimensions | 12.5 x 6.1 x 0.9mm |
Height | 0.9mm |
Length | 12.5mm |
Maximum Operating Supply Voltage | 3.6 V |
Maximum Operating Temperature | +70 °C |
Width | 6.1mm |
Minimum Operating Temperature | -10 °C |
Minimum Operating Supply Voltage | 3 V |
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