MAX2870ETJ+, PLL Clock Driver, 32-Pin TQFN

Integer and Fractional-N Modes
Manual or Automatic VCO Selection
3000MHz to 6000MHz Fundamental VCO
Output Binary Buffers/Dividers for Extended Frequency Range
1/2/4/8/16/32/64/128
23.5MHz to 6000MHz
Low Phase Noise
RMS Jitter: 0.25psRMS (typ)
EVM at 2.1GHz: 0.35% (typ)
High-Performance PFD
105MHz in Integer-N Mode
50MHz in Fractional-N Mode
Reference Frequency Up to 200MHz
Operates from +3.0V to +3.6V Supply
Dual Programmable Outputs
-4dBm to +5dBm
Analog and Digital Lock Detect Indicators
Hardware and Software Shutdown Control
Compatible with 1.8V Control Logic
Applications
Clock Generation
PMAR/LMAR/Public Safety Radio
Satellite Communications
Test and Measurement
Wireless Infrastructure
Wireless LANs/CATV

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