Designed specifically for bus termination in DDR and QDR memory applications. These sink/source tracking termination regulators are aimed for space saving, low-cost applications with low external part counts.
The Texas Instruments TPS51200 device is a sink and source double data rate (DDR)termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration. It maintains a fast transient response and requires a minimum output capacitance of only 20 μF. It supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L,Low-Power DDR3 and DDR4 VTT bus termination.
Input Voltage: Supports 2.5-V Rail and 3.3-V Rail VLDOIN Voltage Range: 1.1 V to 3.5 V Sink and Source Termination Regulator Includes Droop Compensation Requires Minimum Output Capacitance of 20-μF (Typically 3 x 10-μF MLCCs) for Memory Termination Applications (DDR) PGOOD to Monitor Output Regulation EN Input REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider Remote Sensing (VOSNS) ±10-mA Buffered Reference (REFOUT) Built-in Soft Start, UVLO, and OCL Thermal Shutdown Supports DDR, DDR2, DDR3, DDR3L, Low-Power DDR3, and DDR4 VTT Applications 10-Pin VSON Package With Thermal Pad
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