Cost effective PCB design

There are several key challenges in designing a cost effective printed circuit board (PCB). While the initial aim may be to get as small a board as possible, this may not be the most cost effective route for the whole system. Reducing the size of the board is possible with a more complex, multi-layer board that brings with it electromagnetic issues that can cost thousands further down the project.

The electromagnetic interference (EMI) performance is a key factor in the design of the board. Making sure the end equipment conforms to local EMC and interference requirements can be a costly process if corners have been cut in the design and manufacture of the PCB, so some of the cost saving approaches can be short sighted. If the components are coupling or radiating there may need to be costly fixes later on to get the system through conformance testing.

While a four-layer board is regarded the optimum balance of EMI protection and board layout, it is often possible to design a two-layer board with the same performance using online PCB tools such as DesignSpark PCB. This provides a significant reduction in the cost of the board production but has to be done without impacting on the testing further down the line.

Signal return paths are the most difficult design problem to tackle in PCB layout. It would be difficult to route a ground return underneath each trace connected to a signal pin on the controller but this is exactly what the ground plane of a four-layer board does. No matter where the traces run, there is always a ground return path running underneath it.

The closest approximation to having a ground plane in a two-layer board comes from gridding the ground to reduce radiation from the signal traces. Reducing the loop area by routing the return for the signal underneath the signal trace is the most effective way of dealing with this problem so creating a ground grid is the most important thing to do (after floor planning) in laying out the PCB.


Gridding to Create Planes

Gridding is the most critical design technique for two-layer boards. Much like a power utility grid, this is a network of orthogonal connections between traces carrying ground. It effectively creates a ground plane, which provides the same noise reduction as on four-layer boards. This emulates the ground plane of a four-layer board by providing a ground return path under each of the signal traces and lowers the impedance between the microcontroller and the voltage regulation.

Gridding is done by expanding any ground traces and using ground-fill patterns to create a network of connections to ground across the PCB. For example, a PCB has most of the topside traces running vertically and most of the bottom traces running horizontally. This already is working against having the return run directly under signal. First, every ground trace is expanded to fill up as much of the empty PCB space as possible. Then, all the remaining empty space is filled with ground.

The aim is to grid as much as possible on a two-layer board. Small changes in the layout can allow another connection to be made to expand the grid.


Board Zoning

Board zoning is a technique that can be used to reduce the noise and EMI of a board and so reduce the need for the extra PCB layers. It has the same basic meaning as board floor planning, which is the process of defining the general location of components on the blank PCB before drawing in any traces. Board zoning goes a little bit further in that it includes the process of placing like functions on a board in the same general area, as opposed to mixing them together. High-speed logic, including microcontrollers, is placed close to the power supply, with slower components located further away, and analogue components even further still.

With this arrangement, the high-speed logic has less chance to pollute other signal traces. It is especially important that oscillator tank loops be located away from analogue circuits, low-speed signals, and connectors. This applies both to the board, and to the space inside the box containing the board. Do not design in cable assemblies that fold over the oscillator or the microcomputer after final assembly, because they can pick up noise and carry it elsewhere. This has an impact on where the connector head will be placed on the PCB design.



The latest version of the DesignSpark PCB tool includes online design rule checking (DRC) to eliminate problems during the design process rather than waiting to do a batch check. This is particularly helpful in optimising the board for low cost, as any conflicts or errors are immediately flagged and can be countered. Of course the checking is only as good as the design file, and more input from the engineer on possible problems is vital, but this helps speed up the process so more time can be spent on the key areas.  

In Version 5 of DesignSpark PCB the online DRC will check any items that have been added or moved as a result of interactive editing operations. This includes, for example, all tracks attached to a component that has moved or all the tracks and vias that were added when manually routing.

Version 5 of also adds bus support so that common tracks can be grouped together and easily routed. Instead of drawing all the connections across the design and connecting them to every pin required, the designer can make the design less cluttered by using buses. The designer adds connections from a component pin to the bus that carries the signal.


Adding schematic buses in DesignSpark PCB Version 5

Buses can be Open or Closed. A Closed Bus is a collection of net names running along the bus, predefined within the bus where only those nets can be used when connecting to the bus, while an Open Bus can carry any net.

While this of course makes sense for routing buses, it can also be used for routing other sets of lines around the board. This can help to make the design simpler and clearer by grouping a number of noisy traces together surrounded by ground traces using the bus schematic feature, and can help reduce the noise across the board. A good tip is never to run noisy traces on the outside edge of the board, which may be difficult with a smaller two-layer board. Keeping non-noisy traces away from areas on the board were they could pick up noise, such as connectors, oscillator circuits, relays, and relay drivers also helps reduce the problem.


Designing a board with the simplicity required for low cost is probably harder than having the luxury of multiple layers.

Some EMI issues can be addressed with decoupling capacitors and ferrite beads to dampen any signals that are likely to radiate, but this adds to the complexity of the design and to the cost of the manufacturing. If the EMI can be minimised through good design using zoning and awareness of cross talk, then a grid approach to the power and ground lines can provide the same level of shielding in a two-layer board that is possible with four- or six-layer designs. This both reduces the cost of making the board but should also improve the yield and the reliability, further reducing the costs over the lifetime of the equipment.